Revolutionary breakthrough! Cadence’s new generation of system power double swords creates “core” power for IC design

On June 9, 2021, Cadence’s next-generation hardware verification product launch was held in Beijing. The newly released Palladium Z2 enterprise emulation acceleration system and Protium X2 enterprise prototyping system are based on next-generation emulation core processors and Xilinx UltraScale+ VU19P FPGAs. ) design provides the best pre-silicon hardware error correction efficiency and highest software debug throughput.

As a company that started out as EDA software, Cadence’s core competitiveness has always been computing software. However, as the industry continued to develop, Cadence realized that the needs of customers far exceeded the company’s original settings and entered a new field, namely “systems”. Currently, Cadence’s overall strategic thinking is focused on intelligent system design.

Revolutionary breakthrough! Cadence’s new generation of system power double swords creates “core” power for IC design

In order to speed up the design cycle, improve computing power, and enhance the collaboration of software and hardware, Cadence proposed two ideas: first, to accelerate the simulation through hardware; second, to refer to the method of prototype verification. Based on this, Cadence launched the Palladium Z2 and Protium X2 system dynamic duo, namely the Palladium® Z2 enterprise-class hardware emulation acceleration system and the Protium™ X2 enterprise-class prototype verification system. Compared with the first generation launched in 2015, the new system power double sword combination is based on the next-generation customized hardware emulation core processor and Xilinx UltraScale+ VU19P FPGA, which increases the capacity by 2 times and the performance by 1.5 times. Complete more iterations in less time for large-scale silicon validation.

According to Alex Starr, AMD global academician and methodological architect, the dual swords of system power accelerate the chip development process and optimize AMD’s left-shift strategy, which is one of the important achievements of AMD’s success. Hanneke Krekels, senior director of Xilinx’s key application market, also believes that the application of system power double swords allows software engineers to spend valuable time on design verification and software development, rather than time-consuming initial prototype verification.

Revolutionary breakthrough! Cadence’s new generation of system power double swords creates “core” power for IC design

Use the right tool at the right time and in the right context

“Why does Cadence have two hardware products for simulation verification? In fact, the tools used at different time points of the project are different. In the early stage of RTL verification and power analysis, simulation acceleration will be used. When 80% and 90% of the designs are mature, the software team begins to intervene, and the design will be slowly migrated to the prototype verification platform until the final chip Tape Out. This process will greatly improve the success rate of tape-out.” Mr. Zhang Yongzhuan, Senior Director of Cadence Asia Pacific System Solutions, said.

Revolutionary breakthrough! Cadence’s new generation of system power double swords creates “core” power for IC design

Mr. Zhang Yongzhuan, Senior Director of Cadence Asia Pacific System Solutions

What upgrades has Cadence made on the new generation of products?

  • Process

The first upgrade is on the Palladium Z2 process. “We have made some new progress in the process.” Zhang Yongzhuan said, “Simply put, our simulator can perform almost the same function as software simulation in the future. We have made some special designs to make the original For the hardware simulation, we call it 2 State, and in addition to 0 and 1, we can add 4 State, which is a very advanced method, which can make the system compatibility a little more efficient.”

  • FPGA

The second breakthrough point is on Protium’s FPGA. It is reported that Protium X1 uses Xilinx UltraScale440, while the new generation uses VU-19P. This results in a larger capacity per gram and a significant increase in performance. “We have made some great improvements to the interface in the connection with the host, which is compatible with the hardware acceleration of Palladium Z2, which means that such a design can be run in hardware acceleration, and it can be migrated to Protium soon. .” Zhang Yongzhuan said, “So imagine that in the future, software simulation, hardware acceleration, and prototype verification may be integrated in the future, and Compile will be completely the same platform.”

System power double swords, why do they dominate one side?

  • quick

According to Zhang Yongzhuan, Palladium Z2 is currently the fastest compiling speed in the industry in the world, capable of reaching dozens of Billion Gates. “I can get Compile in ten hours.” Zhang Yongzhuan said, “I can get it when I go to work in the morning and get it before I get off work in the evening, and I can compile 250 Million Gate every two hours.”

  • Comprehensive error correction (Debug) function

The ability of Debug actually depends on two aspects, one is observability (Visibility), and the other is controllability. Unlike FPGA-based emulators, the advantage of processor-based emulators is debugging. Palladium Z2 is special in design. Different from commercial processors, Palladium Z2 uses Cadence’s new custom processor, so it has a powerful Debug function. “When your design enters the Palladium machine, our compiler will convert your design and my scheduling tool into my instruction level and put it here for execution, so as soon as I Compile, immediately It can run, no need for Place & Route. When your Design is placed in my Palladium, I can see all the signals, so the accuracy rate is 100%.” ​​Zhang Yongzhuan introduced.

  • No need to recompile

When you want to trigger some conditions during the Debug process to debug (ie: Trigger Condition), you don’t need to recompile. This means that the design can be accepted through rapid iteration to achieve better quality.

  • Can be migrated quickly

Palladium can be quickly migrated to Protium, possibly reaching a prototyping platform within days. This work used to require a lot of time and labor costs to achieve.

  • Best-in-class pre-silicon verification performance for 1 billion gate chip designs

According to reports, the speed of Protium is 3-5 times that of Palladium. According to Tran Nguyen, senior director of design services at Arm, the use of the system power double sword has enabled Arm to achieve more than 50% performance improvement and 2 times the capacity increase on the latest design, providing it with the verification of next-generation IP and products. strong pre-silicon verification capabilities required.

  • Broad application

“Protium also provides the so-called In-circuit Emulation, Virtualization (virtual prototype), Memory Model.” Zhang Yongzhuan said, “meaning you can use the physical card to run on it, such as PCIe, or virtual PCIe in It can run on it, or a virtual model. So the application level is very wide.”

Revolutionary breakthrough! Cadence’s new generation of system power double swords creates “core” power for IC design

Palladium, enabling hardware acceleration to benefit the entire industry

“The current state of use in the entire industry is that Palladium is used by about 90% of the world’s customers. It has the fastest pre-silicon Performance, it has powerful capabilities, and a rack like this can hold 144 users on it at the same time. Online use.” Zhang Yongzhuan said. It is reported that Palladium can support all hardware designs, RTL Design, Verilog, VHDL are all acceptable. In addition, Palladium can also be put together with the external virtual model, and can be simulated together with the simulation at the same time, which looks like a software simulation. In addition, Palladium provides a very rich memory model (Memory Model), such as: DDR5, DDR4, HBM or UFS. Palladium has a special way of emulation that puts memory directly on hardware accelerators, so it can solve all memory models available on complex systems. Finally, Palladium provides corresponding physical interfaces for standard interfaces such as PCIE, USB, and Ethernet, such as slowdown walls or virtual models. “As far as we can see, we don’t have any design that says it can’t be used on Palladium. It can allow the entire industry to get the benefits of hardware acceleration.” Zhang Yongzhuan said, “In addition, Cadence will also provide good services to small and medium-sized customers. support, such as the use of cloud, leasing and other more flexible methods to create more convenient conditions for enterprises with financial problems.”

Speed ​​up and safety

When it comes to information security, Zhang Yongzhuan said that the system power Shuangjian also provides guarantees in information security. The communication channel between Cadence Palladium and the server and host is encrypted. Therefore, its requirements as a whole are not easy to be cracked. Since its design is compiled, not original, using such a platform for simulation acceleration and prototyping can be a win-win for speedup and information security assurance.

Twin brothers and dual engines, working together to solve industrial pain points

At Nvidia, every upgrade to high-end graphics and hyperscale designs means increased complexity and tighter time-to-market, and with a common front-end flow combining Cadence Palladium Z2 and Protium X2 systems, Nvidia can optimize functional verification Workload distribution for verification, functional validation, and pre-silicon software initiation, complete on-time full verification of the most complex GPU and SoC designs. “These two system-powered twin swords are like twin brothers and twin engines, helping to solve the relatively big problems that the entire industry is seeing now.” Zhang Yongzhuan concluded at the end.

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